AI Agent Skills

Profile Intel-XPU workloads at the SYCL / Level Zero kernel level via Intel pti-gpu's unitrace. Captures per-API-call and per-kernel timing, memory transfers, oneCCL / M…

Use when changing PlayCanvas rendering code that must not visibly change the rendered image — draw-call optimization, hardware instancing, shader or material refactors,…

Start robotics apps or demos from compatible examples for interactive simulation, pretrained visual control, mapping/navigation, robot assistants, or manipulation. Choos…

Choose and structure training data for robot-learning projects.

Integrate and debug Gemini Robotics ER perception, function calls, and guarded execution. For a first natural-language robot assistant demo, start with architect's refer…

Mine, compare, or re-crawl approved external robotics repositories into local evidence-cited Robium observations for later skill absorption.

Build and debug MuJoCo robot simulations. First interactive robot tryouts start with architect's reference-app selection.

Configure, extend, and debug Nav2 in an existing robot app; explain navigation concepts. New mapping/localization/navigation demos start with architect.

Use to extract a source-cited QEMU register and behavior contract from drivers, datasheets, firmware, device trees, runtime traces, and SVD, IP-XACT, SystemRDL, or vendo…

Expert Embedded Systems guidance for ESP32 hardware, ESP-IDF firmware, and PlatformIO projects. Use for chip selection (S3, C3, C6, etc.), memory management (MMU, PSRAM)…

Use when studying, adapting, porting, or debugging embedded application example projects such as ESP32-IoT-Platform, HomeAutomation, CanBus-Triple, or TinyGameEngine

Use when verifying a hardware DUT (a CPU core, FPGA, or netlist) against a golden reference model, building coverage-guided fuzzing, or detecting where silicon diverges…

Use when loading a bitstream onto a physical FPGA and driving or observing it over JTAG or GPIO, especially bit-banged JTAG from a host like a Raspberry Pi, or when conf…

Use when packaging EDA or hardware toolchains in Nix (Yosys, OpenROAD, simulators, vendor tools) and hitting dlopen/plugin/runtime-path failures, or writing derivations…

Use when implementing a hardware block, protocol, peripheral, or ISA feature in ROHD and you should ground it in the authoritative spec, existing reference implementatio…

Use when composing an SoC from peripherals and a bus fabric, or when generating device trees, ACPI tables, docs, or pin lists from a hardware description and they keep d…